Phase controlled measuring system



3 Sheets-Sheet 1 nik C. CLARK, JR

PHASE CONTROLLED MEASURING SYSTEM April 19, 1960 Filed Nov. 14, 1957 April 19, 1960 c. CLARK, 1R 2,933,683

PHASE CONTROLLED MEASURING SYSTEM Filed NOV. 14, 195'? 3 sheets-sheet 2 INV ENTOR. CHARLES' CZRK f//r BY m April 19, 1960 C, CLARK, JR 2,933,683

PHASE CONTROLLED MEASURING SYSTEM Filed NOV. 14. 1957 3 Sheets-Sheet 3 f. am@ sec.

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United States Patent C) PHASE CONTROLLED D'IEASURING SYSTEM Charles Clark, Jr., Baltimore, Md., assignor, by mesne assignments, to the United States of America as represented by the Secretary of the Air Force Application November 14, 1957, Serial No. 696,575

6 Claims. (Cl. S24- 83) This invention relates to a measuring system and more particularly to a system which automatically and continuously measures the jitter present in an electronic system that employs an oscillator that is phase locked by an injected locking pulse.

litter from a locxed oscillator comes from two main causes: one, improper oscillator locking and two, short time oscillator frequency drift. When a locked oscillator such as a coherent oscillator is incorporated in a system such as MTI, the jitter of the coherent oscillator 4imposes a limitation on the effectiveness of the MTI system. The jitter factor is very important to the accuracy of operation, consequently, it is highly desirable to utilize an automatic jitter measuring apparatus which may be integrated with the MTI system.

An object of the present invention is to provide a system to measure the amount of jitter existing in a phase locked oscillator.

A 4further object of my invention is to provide a system capable of time jitter measurements in the order of .2 millimicrosecond.

A still further object of my invention is to provide a system to automatically and continuously measure jitter present in a phase locked oscillator.

Still further objects and advantages of the present invention will appear from the more detailed description set forth below, it being understood, however, that a more detailed description is given by way of illustration and exploration only, and not by way of limitation, since various changes therein may be made by those skilled in the art without departing from the scope and spirit of the present invention.

In the drawings:

Fig. l is a block diagram of a system for automatically measuring jitter present in a phase locked oscillator;

Fig. 2 shows a 6BN6 mixer and o detector including its associated circuitry;

Fig. 3 shows curves of current flow in the 6BN6 mixer; and

Figs. 4 and 5 show curves illustrating the effect of v phase shift upon current ow in the 6BN6 mixer.

In a preferred embodiment of the present invention, terminal 1 is adapted to receive a locking pulse (such as utilized in an MTI system) which is then simultaneously fed into oscillaltor driver 2 and delay line driver 6. Delay line driver 6 ampliiies the locking pulse so that the locking pulse that is coupled to signal generator unit 7 vin the form of a quartz reiiecting delay line is large vthese pulses would be of different amplitudes, so to over- '2,933,683 Patented Apr. 19, 1960 ICC pulses have the same amplitude at the output of gaiu-` gated `I.F. amplifier 8. Multivibrator 9 receives its synchronizing signal from terminal 16. The synchronizing signal is supplied by the MTI system of which coherent oscillator 3 is a part. The synchronizing signal is related in time to aforementioned locking pulse. LF. ampliers 1t! and 6BN6 driver 11 are utilized following gaingated amplifier 8 to cause all of the pulses to be at a high signal level at the input 13 of mixer 12. Mixer 12 may be a beam type vacuum tube such as a 6BN6.

The locking pulse which was fed to oscillator driver 2 is amplified therein and injected into coherent oscillator 3 to cause phase locking. The high frequency C.W. signal from coherent oscillator 3 is fed into amplifier 4 and then the amplilied C.W. is fed into mixer driver 5. The CW output of mixer driver 5 is fed into input 14 of mixer 12.

The circuitry for 6BN6 mixer 12 of Fig. 1 is Shown in Fig. 2. Input 13 of Fig. l is shown as input 13 of Fig. 2 and is'adapted to receive ampliied signals of 30 to 60 pulses. Input 14 of Fig. l is shown as input 14 of Fig. 2 and is adapted to receive an amplified C W. signal. Vacuum tube 1 utilized in the mixer is a tube such as the 6BN6 type.

The train of pulses entering input 13 and the C.W. signal at input 14 are at a high signal level at control grids of vacuum tube 1 in order to cause sharp switching of the said tube since it is essentially a high speed electronic switch.

The mixer operates in the following way: the two signals (l) the 30-6() pulses and, (2) the amplijed oscillator C.W. are coupled to vacuum tube 1 at two separate grids, 2 and 3 respectively. The grids of any electronic tube are the controlling elements; consequently, these two grids of vacuum tube 1 are the controlling elements; vacuum tube 1 will not conduct (pass current) unless there is a signal present on both grids simultaneously; hence, the two grids act as two series connected controlling switches. That is, both must be on to allow vacuum tube 1 to conduct. However, the frequency of each signalthe pulses and oscillator C.W.-is the same because both use the same source frequencythe locking pulse; thus when both grids of vacuum tube 1 contain a signal simultaneously, tube 1 will be switched on and current ow will be a maximum as shown in Fig. 3.

The circuitry for vacuum tube 1 is so designed that conduction results in the positive half cycles-cathode 4 of tube` 1 is connected to ground. From Fig. 3 itis seen that if one of the cycles is displaced in time from the other the current owing through vacuum tube 1 will be less than as illustrated which represents both signals in phase. By examining Figs. 4 and 5, it may be seen that a phase shift of only 10 or a time displacement of 0.0'0093 microsecond-eusing a 30 megacycle signalresults in an 11% change of current per cycle. This 11% change of current can easily be indicated by a metering circuit designed to record the output from vacuum tube 1.

From the preceding paragraph, it is apparent that no ordinary circuit can differentiate 0.93 millimicrosecond. Now, the circuit is designed to check the jitter of coherent oscillator*which can result from two causes. One is improper phase locking of the oscillator under observation and the other is frequency drift of the oscil lator.

" "the i t'o 'external source of toineasure the degree 1 V4 phaselocked C.W. 'signal deviates fromsaid gain gated Non 'again referring to Fig. l, 'if "the bsc'illations 'of coherent oscillator 3 are not phase locked, because of .too weak-locking pulse or a high distorted (pulse full of-harmcnics and/orgpoor leadingedge) locking pulse, the oscillations of coherent oscillator 3 will not beV in phase the 'oscillations of the pulse; consequently,

`laxirnim but'some value less than maximum. Because of the high frequency stability required and used in herentt'oscillator 3, the phase difference betweenV the Ytwosig'nals will be constant and the current how through Amixer 12 will be a constant value less than maxi- If the frequency of coherent oscillator 3 drifts, v the .frequencyY drift Will cause a varying phase shift from ,cycl'eft cycle; thus, the current now through 6BN6 mixer The metering circuit of the present invention is so 'arranged that, normally, vjitter 'indicator 15, which may be` a "microarnmet'er lindicates 6BN6 mixer 12 current fil'oyv represented by any improper phase locking and coherent oscillator frequency drift. However, the face "of Vvjitter indicator fis Acalibrated such that certain meter indicates oscillator 'jitter trouble. As 'stated before, maximum 6BN6 "mixer current indicates phase,

coherence and any value less than maximum'indicate's oscillatorjitte'r; thus the face of jitter indicator 15 would Y have to be `calibrated for the particular system and oscil- 'latorfitsted (i.e., yoscillator allowable frequency drift zand'ability Yto phase'lock differ, consequently, excessive njitter one/'oscillator would not necessarily mean, the

same amount oscillator) said C.W. signal Agenerator producing 4a phase-locked Y C.W.V signal, said train of pulsed C.W. signals being utilized as Va reference signaL'mcans to gain gate said 4of pulses, said gating meansbeing solely responsive:

synchronizing signal and means 'n phase, if'any, by which said `lsed CLW. signal, said lastln'ar'ned means including a .,bl.

Lphase-locked `C;W. lsignal "and 'said gain gated pulsed C.W. signal, 'and meter means to measure the output of said 'beam type electrondischarge device and thereby determine therpresence or absence of jitter as reflected amene' ,cilrrcntV through 6BN6 mixer 12 will not be at a ,Y

phase, 'if any, by 'which said phase locked C.W. "signal deviates from said pulsed C.W. signal, said last-named means including a beam type electron discharge device for receiving Vthe said phased locked C.W. signal and said train of pulsedOW. signals, and means responsive to said phase locked C.W. signal and said train of pulsed C.W. signals to sharply switch said beam type electron l discharge device to a conducting state, the variation in t fmagnitude of said conduction determining the magnitude l()VV Iof 'said jitter. l Y t 3. A system for automatically measuring jitter in a phase Ylocked oscillatorrcomprising an oscillator and a ringing Yquartz delay line both receiving a common locking pulse, said locking pulse utilized Vto phase lock said oscillator and simultaneously generate a train of pulsed C.W. signals from said quartz delay line for eachV of said Ylocking pulses, circuitry including Va beam-type Velectron discharge 'devicerreceiving dual inputs, one a lof jitter would be excessive for another J Jittcr indicator 15 may be calibrated in any convement scale or system that indicates 'whether the type electron Adischarge idevice `for receiving said' i.in the reaction of said beam typeelectron discharge device to said last tvvo-namedsi'gnals applied thereto.

'2. "Means for determining the presence or absence of Y'jitterini a phase locking communication system comprising, in'combination, a continuous wave signal genferatorand a quartz reecting delay line, Vsaid Vquartz -relecting delay line operating as a VVpulse generator, lmeans for `applying a common phase locking pulse from an external l*source toesaid Vcontinuous wave signal gen- Ycrater landsaid quartz'reecting delay line, to control their operation, said quartz` reflecting delay line producinga trainvof'pulsed C.W."signalsV upon application of f Aeach of said locking pulses-thereto, and said continuous Vvsfave'signal generator producing Ya phase-locked C.W. "signal, said train of pulsed C.W. 'signals being utilized Ikasta reference fsignal, means for-'gain 'gating'said't'rain' "ofpulsed Clisignals, saidfgating means being solely responsive'to an external source operating to -supply synchronizing signals means to measure the degree in CW. signal from said phase locked oscillator and the other being said train of pulse VC.W. signals from V"said Aquartz delay line, and meter means tomeasure the output of ,said beam type electron discharge device and thereby determine the presence or absence of'jitter as reflected in the reaction of said beam type electron'disfcharge device to said tWo signals. t

4. A system for automatically measuring jitter'in 'a fphase Vlocked oscillator comprising a sine wave signal generatoradapted to being phase locked, a quartz `refleeting 'delay lineoperating as a C.W. vpulse generator, means for applying to said sine Wave generator and said quartz reecting delay line a common phase locking pulse Vderived from an external source, torcontrol their "operation,l said sine Wave generator producing a phase-locked sine Wave signal, Vsaid quartz reecting delay line producing a train of C.WQ pulses for each of said YVphase lockingfpulses, means to gain-gate said train of C.W.'pulse's, said gain-gating means being solely responsive to an external source of synchronizing signal, means including Aa beam type electron discharge device, said beam type electron discharge Vdevice 'having said last two-namedY signals applied thereto, and means tor'meast-l ure the output of Ysaid beam type electron discharge device to determine they presence or absence of jitter as reected inthe yreaction of said beam type electron jdischarge device to said last two-named signals to establish leach of said gain-gated train of C.W. pulses as'a reference signal for saidrphase-locked sine wave signal.

S. A system forv automatically measuring jitter in "a phase-locked oscillator comprising aV sine 'Wave signal vgenerator adapted to be phase-locked, a quartz reflecting delayline Voperating'as a C.W. pulse generator, means `fo`r applyingto saidsine wave generator and vsaid quartz Vreliecting delay line a common phase locking pulse derived from'an external source, to control their opera- VAtion, said Ysine wave oscillator yproducing a phase-locked sine wave signal, said quartz reiiecting delay line produc- Ying a train of C.W. pulses for each of said phase-locking pulses, means to gain-gate said train of C.W. pulses, said gain-gating Vmeans being solely responsive to an'external source of synchronizing signal, means to separately am- Y plify said phase-locked sine Wave signals and said gain- -v gated train of C.W. pulses,'a beam type electron discharge device having first and second control grids, an anode, and a cathode, means toV kapply said amplified phaselocked sine Wave signal to'said first 'control grid,

meansto apply said ampliiied train of C.W. pulses to said secondcontrol `grid,1 and means to drive said electron ldischarge device to maximum conduction when said1ap- VVplled signals are in vphase* with eachother.

`6. 'In Vasystem for automatically measuring jitter in a phase-locked sine wave oscillator comprisingY means to i phase-'lock said s1ne waveroscillatonimeans to generate a series of GW. pulses of the same frequencyiand' phase c yfsaidsine' waveV oscillator, Ysaid sine fwave voscillator land Said Cv-W. pulse generator receiving a. common phasesaid output signal varying from maximum to a lower magnitude when said impressed signals vary in phase.

References Cited in the le of this patent UNITED STATES PATENTS Wout Dec. 3, 1940 Miller et al. Oct. 11, 1949 Beal et al. Apr. 16, 1957 

